As the co-chair of the Si2 OpenAccess Change Team, Gregory Schaeffer will attest that change in the technical standards world, though critical, is anything but easy. Schaeffer is a senior software engineer at IBM, his only employer since earning an MS in Computer Science from Case Western University. A native of Elizabethtown, Pa., Schaeffer said […]
By Vic Kulkarni Senior Vice President and General Manager RTL Power Business ANSYS, Inc. San Jose, Calif. www.ansys.com Innovation in semiconductor design is enabling smaller device architectures with higher performance and energy-efficient devices for powering smart products in the emerging Internet of Things verticals. In addition to solving problems posed by the Moore’s Law, traditional EDA […]
By Marshall Tiner Director, Production Standards In a recent article, Randy Smith, vice president of Marketing for Sonics, pinpointed a problem confronting the EDA industry. “The difference between IP and EDA doesn’t matter much anymore. It is all about design acceleration. “Where can we make a difference?” he added. “The physical design flow has been commoditized at […]
Si2 is planning to launch its first special interest group, which will focus on process design kits. Ted Paone, interoperability standards architect, said the SIG will “refine the methodology to improve process data and create quality process design kits.” Special interest groups are open to all Si2 members. For more information contact Ted Paone, firstname.lastname@example.org
Si2 and other research and development joint ventures fill an important need for semiconductor companies competing in a fast-changing global market. What are R&D joint ventures and what do you need to know about them? The National Cooperative Research and Production Act of 1993 (NCRPA) is the fundamental law that defines R&D joint ventures and […]
OpenStandards, Si2’s newest member initiative, is the product of extensive member research and the core of a streamlined standards development process. John Ellis, president and CEO, said market research and industry trends identified factors key to the creation of OpenStandards. “Speed and agility topped the list. The ability to quickly identify and create a needed […]
Si2’s Silicon Photonics Working Group needs your participation to help chart our future activities. Please join us Tuesday evening at the 2016 Optical Interconnects Conference in San Diego for the Silicon Photonics Working Group panel discussion.
See the vision of the future of Integrated Photonics from our discussion panel consisting of industry leaders.
Learn what our panelists think about the key challenges in realizing this vision, including required design tools and engineering skills.
Participate in an open Q&A following the panel discussion to add your thoughts and relevant experiences.
Dominic Goodwill, Huawei Canada
John Bowers, UC Santa Barbara
Jock Bovington, Oracle
Peter De Dobbelaere, Luxtera
Greg Fish, Aurrion
Panel discussion will begin at 6:15PM following the conference welcome reception.
All SoC designs today face low power design issues of one sort or another–maximizing battery life, sizing power grids, controlling leakage power, verifying power sequencing, estimating and modeling power at various abstractions, analyzing electro-thermal effects and utilizing power intent standards. The list goes on and on. This panel will explore current methods for dealing with the many critical power issues along with limitations of those methods. Both design and the design automation perspectives will be offered.
What you will learn:
Best practices from low power design leaders
New developments in power modeling
Challenges and solutions for power aware system-level design
Moderator: Jerry Frenkil, Director of OpenStandards, Si2
Nagu Dhanwada, Low Power Tools and Methodology Lead, IBM
Aaron Grenat, Fellow Design Engineer, AMD
John Redmond, Associate Technical Director for Digital Video, Broadcom
Frank Schirrmeister, Senior Group Director, Product Management & Marketing, Cadence Design Systems
Minalogic is a global innovation cluster for digital technologies serving France’s Auvergne-Rhône-Alpes region. The cluster supports the region’s leading innovators by facilitating networking, fostering collaborative R&D, and providing companies with personalized assistance throughout all phases of business growth. The products and services developed by our members address all industries, from ICT and healthcare to energy and advanced manufacturing. Minalogic was founded in 2005 and today boasts more than 300 members, including 270 companies.
Panel: 4:00-5:00 p.m.
Reception: 5:00-6:00 p.m.
Introduction: Philippe Magarshack, President of Minalogic and Executive Vice President, STMicroelectronics
Guest of Honor and Panel Moderator: James H. Hogan, Managing Partner of Vista Ventures, LLC
Philippe Magarshack, President, Minalogic
Firas Mohamed, General Manager – Silvaco France
Chouki Aktouf, Founder & CEO, DeFacTo Technologies – representative of the EDA SME members of Minalogic
Thierry Collette, Vice President, Architecture, IC Design & Embedded Software Division, CEA
(Tuesday) 4:00 pm - 6:00 pm CST
Si2 Booth 239
Silicon Integration Initiative
NXP Semiconductors6501 W William Cannon Drive Austin TX 78735
There is no public transportation from the airport to the hotel; however, arrangements can be made by contacting Super Shuttle, Lyft, or Uber, or catching a taxi at Austin-Bergstrom International Airport (ABIA).
Additional days For those members who would like to book additional days, the hotel is providing the same preferred rate for several days before and after, subject to availability. If you want to stay additional days before or after the room block dates, you will need to contact:
Robert Mendoza Sales Manager Phone: +1.512.483.5916 Mobile: +1.512.406.1876 email: email@example.com